NEX-563XX

The NEX-563XX Disassembly Support provides clocking, setup, and disassembly of the 18 and 24-bit 563XX microprocessor family. NEX-563XX is software only. Specific wiring must be followed if the 563XX signals are routed to Mictor connectors for interface to the TLA700 Logic Analyzer. Please refer to the 563XX manual below for more information. If a connector is not designed into the target, a general purpose probe adapter must be used. Many types are available from third party vendors.

Download a demo version of the 563XX disassembler

Disassembly: Supports Parallel and Non-Parallel instructions.

Addressing modes supported:
Register Direct, Address Register Indirect, PC Relative, Special Addressing Modes (Immediate Data, Immediate Short Data, Absolute Address, Absolute Short Address, Short Jump Address, I/O Short Address, Implicit Reference).

Instructions supported:
Data Move Instructions, X Memory Data Moves, X Memory and Register Data Move, Y Memory Data Moves, Y Memory and Register Data Moves, Long Data Memory Move, XY Memory Data Move

Parallel Instructions:
ABS D - ADC S,D - ADD S,D - ADDL S,D - ADDR S,D - AND S,D - ASL D - ASR D - CLR D CMP S1,S2 - CMPM S1,S2 - EOR S,D - LSL D - LSR D - MAX A,B - MAXM A,B - MAC (+-) MACR (+-) - MOVE(NOP) - MPY (+-)S1,S2,D - MPYR (+-) - NEG D - NOT D - OR S,D RND D - ROL D - ROR D - SBC S,D - SUB S,D - SUBL S,D - SUBR S,D - TFR S,D - TST S

Other Instructions
ADD - AND - ASL - ASR - Bcc - BCHG - BCLR - BRA - BRCLR - BRKcc - BRSET - BScc - BSCLR - BSET - BSR BSSET - BTST - CLB - CMP - CMPU - DEBUG - DEC - DIV - DMAC - DO - DO FOREVER - DOR - DOR FOREVER ENDDO - EOR - EXTRACT - EXTRACTU - Ifcc - ILLEGAL - INC - INSERT - Jcc - JCLR - JMP - JScc - JSCLR - JSET JSR - JSSET - LRA - LSL - LSR - LUA - MAC - MERGE - MOVE - MOVEP - MPY - NORM - OR - PFLUSH - PFLUSHUN - PFREE - PLOCKR - PUNLOCK - REP - RESET - RTI - RTS - STOP - SUB - Tcc - TRAP - WAIT

8-bit fetches are not disassembled at this time: Disassembly Screen is a screen shot showing 563XX disassembly. Timing Screen shows a timing trace of the 563XX acquisition.

Timing Analysis: By acquiring data in asynchronous mode on the Tektronix Logic Analyzer, high speed accurate timing measurements can be made of the 563XX up to 2Ghz (500 ps) using a Tek TLA700 system..

Correlating Bus Activity: While the NEX-563XX package is being used to monitor the 563XX activity, another acquisition module can be used to monitor activity elsewhere in the system. The results of the two acquisitions can be correlated in time to determine the sequence of actions that occurred. For instance, a PCI bus could be monitored and correlated with 563XX activity.

LAs Supported / Channel Count Requirement
TLA600/700 Support (Can be used with TLA7L/M/N/P or Q cards)DAS9200 & TLA500 (92A96/C96) Support Prism 3000 32 GPX Support TLA700 Channels Required Notes
Y N N 102 Motorola 563xx family disassembly software.

Demo Software
This software demos the reference memory that is included and will not disassemble new 563XX acquisitions.

Installation Instructions:

  • Copy 563xx_d.exe to the TLA700.
  • Execute 563xx_d.exe.
    • The download file is a self-extracting zip file.
    • Installation files will be unzipped to the directory where 563xx_d.exe exists.
  • Run setup.exe.

Download NEX-563XX Demo Software