NEX-IBM440GP

  • Quickly setup your Tektronix Logic Analyzer
  • Disassembly of the IBM440GP data acquired from the DDR bus
  • 8GHz timing acquisition on every channel - dependent upon the Tektronix acquisition module used

The NEX-IBM440GP support software acquires and decodes IBM440GP bus activity and displays the information as assembly language mnemonics (machine code). This permits the tracing of code execution for debug purposes. It is possible to filter the data display cycle types of interest to the software engineer. The user can choose to display the acquired data in Hardware, Software, Control Flow, or Subroutine modes.

A major feature of the NEX- IBM440GP software is its ability to intelligently acquire bus cycle information. By taking advantage of the data clocking power built in to the Tektronix Logic Analyzers, the support software is able to acquire only the valid IBM440GP bus cycles and ignore Idle and Wait states. This means that the user is able to make optimum use of the acquisition card's memory and see more microprocessor bus cycles. For debug purposes the user also has the ability to override this function and acquire data on every Rising CLK Edge to permit the user to see all of the bus traffic including the Idle and Wait states.

Every stored cycle (bus or clock edge, depending upon clocking selection) has a timestamp value stored with it. This time information, accurate to 125ps in the TLA700 series, permits precise measurements of microprocessor bus activity. Because of the design of Tektronix Logic Analyzers there is no need to worry about trading off acquisition memory depth when making these measurements, as the timestamp memory is separate from the acquisition memory.

Disassembly Support
The IBM440GP supports two sets of instruction codes for disassembly display. The Book E opcodes are displayed by default. The NEX-IBM440GP disassembler also supports the Extended Mnemonics of the PowerPC family as listed in Section 28.5 of Preliminary IBM PPC440GP Embedded Processor User's Manual and subject to the qualifications detailed in the NEX-IBM440GP User Manual.

Connecting the TLA700 to a IBM440GP Target
There are two methods of connecting the TLA700. First, the interface may be designed directly into the target. This requires following a pinout provided by New Wave for the probe footprints. Please contact us for this information. If an integrated probe design is not desired or the target is already built, than a New Wave DDR adapter card is needed to provide the interface. These cards will supply disassembly information from up to a 400MHz DDR bus. More information on the DDR adapters can be found here or by contacting us.

LAs Support / Configuration
Acquisition Type200 MHz 266 MHz 333 MHz 400 MHz TLA7Ax4 Module Count Merged Modules
Read and Write X X X X 2 X

A TLA700 equipped with two, merged, 136-channel, 450 MHz state speed, acquisition modules (TLA7AA4 or TLA7AB4 cards) with four P6860 probes are required for DDR Read and Write data acquisition.

The TLA Application Software must be V4.2 or later.