NEX-IXP1200
The NEX-IXP1200 Disassembly Support provides clocking, setup, and disassembly of the IXP1200 microprocessor. NEX-IXP1200 is software only. Specific wiring must be followed if the IXP1200 signals are routed to Mictor connectors for interface to the TLA600 or 700 Logic Analyzer. Please refer to the IXP1200 Data Sheet below for more information.
Disassembly: Identification / Support of the following: Architecture v4 Level Instructions and Addressing modes, Load data read cycle detection, LDM and LDC multiple load read cycle detection, Branch Prefetch Instruction flush detection, and Mark-Opcode support. Supports all five addressing modes. Instructions supported include: ADC, ADD, AND, B, BL, BIC, BX, CDP, CMN, CMP, EOR, LDC, LDM(1), LDM(2), LDM(3), LDR, LDRB, LDRBT, LDRH, LDRSB, LDRSH, LDRT, MCR, MLA, MOV, MRC, MRS, MSR, MUL, MVN, ORR, RSB, RSC, SBC, SMLAL, SMULL, STC, STM(1), STM(2), STR, STRB, STRBT, STRH, STRT, SUB, SWI, SWP, SWPB, TEQ, TST, UMLAL, and UMULL. Please download the data sheet for more information.
Timing Analysis: By acquiring data in asynchronous mode on the Tektronix Logic Analyzer, high speed accurate timing measurements can be made of the IXP1200 up to 2Ghz (500 ps) using a Tek TLA600 or 700 system..
Correlating Bus Activity: While the NEX-IXP1200 package is being used to monitor the IXP1200 activity, another acquisition module can be used to monitor activity elsewhere in the system. The results of the two acquisitions can be correlated in time to determine the sequence of actions that occurred. For instance, a PCI bus could be monitored and correlated with the IXP1200 activity.
LAs Supported / Channel Count Requirement
| TLA600/700 Support (Can be used with TLA7L/M/N/P or Q cards) | DAS9200 & TLA500 (92A96/C96) Support | Prism 3000 32 GPX Support | TLA700 Channels Required | Notes |
|---|---|---|---|---|
| Y | N | N | 102 | IXP1200 Disassembly S/W |
Ordering Information
Please send quote requests to quotes@nexustechnology.com. Purchase orders can be faxed to 877-595-8118.
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